
Postdoctoral Scholar
ETH Zurich
Chenhao Chu
I am currently a postdoc at Integrated Devices, Electronics, And Systems Group (IDEAS), working with Prof. Dr. Hua Wang from Swiss Federal Institute of Technology Zürich (ETH Zürich).
I received my Ph.D. from RF & Microwave Research Group at University College Dublin (UCD), advised by Prof. Anding Zhu, and I obtained my master's degree from City University of Hong Kong, advised by Prof. Quan Xue.
My research interests include energy-efficient, linear, and wideband power amplification in III-V and silicon technologies. I am also working on the AI-assisted rapid end-to-end design synthesis of RF/mm-Wave circuits. I received three awards in the IEEE MTT-S High-Efficiency Power Amplifier Student Design Competitions (HEPA-SDC), including second place at IMS2021, first place at RWW2022, and third place at IMS2022.
Education
Ph.D. in Electronic Engineering
University College Dublin, Dublin, Ireland (Sep 2018 – Oct 2022, Advisor: Prof. Anding Zhu)
M.Sc. in Electronic Information Engineering (Distinction)
City University of Hong Kong, Hong Kong, China (Sep 2016 – Oct 2017, Advisor: Prof. Quan Xue)
Research Area
- Energy-efficient, high-linearity, and wideband power amplification in silicon and non-silicon technologies
- AI-assisted reconfiguration and rapid end-to-end design synthesis of RF/mm-Wave circuits and devices
- Broadband and reconfigurable RF/mm-Wave III-V/Si circuit co-designs
- Wide/multi-band mm-Wave antenna-in-package (AiP) for phased arrays
News
2025
April: Elected Affiliated Member, IEEE MTT-S TC-12
I was officially elected as an Affiliated Member of IEEE MTT-S TC-12 (Microwave High-Power Techniques Committee). [TC-12]
Mar: Selected as IEEE MTT-S Volunteer Spotlight
I was featured as the IEEE MTT-S Volunteer Spotlight in the March 2025 issue of the MTT-S newsletter. [Newsletter]
Mar: Presented at German Microwave Week, Dresden
I attended German Microwave Week 2025 in Dresden and presented our paper "Deep Learning-Assisted RFIC Design With Dual-Metal-Layer Passive Matching Networks: A 15–22 GHz CMOS PA for 6G in 22nm FDX+" at GeMiC 2025.
Feb: Paper accepted for IMS 2025 – AI-Assisted Multi-Layer On-chip Passives
Our paper "AI-Assisted Template-Seeded Pixelated Design for Multi-Metal-Layer High-Coupling EM Structures: A Ku-Band 6G FR3 PA in 22nm FDX+" was accepted for presentation at IEEE IMS 2025.
Jan: Attended IMS 2025 DPRC meetings, San Juan, Puerto Rico
Participated in the IMS 2025 TPRC meetings in San Juan, Puerto Rico.
Jan: Presented at IEEE RWW 2025
Presented our latest work on "10-16 GHz High Efficiency Power Amplifier MMIC Using GaN HEMT for 6G Applications" IEEE Radio & Wireless Week (RWW 2025).
2024
Jun 18: I presented our conference paper at IMS 2024.
The paper is entitled "Transfer Learning Assisted Fast Design Migration Over Technology Nodes: A Study on Transformer Matching Network".
- Proposed a methodology using transfer learning from a pre-trained source synthesis NN model to target domain for 1:1 on-chip transformer design.
- Generated source (GF 45SOI) and target (GF 22FDX+) grid data at different frequencies and metal layers with different data densities.
- Proved transfer learning can both accelerate the training process in the target domain and improve the R2 (R-squared) values of the models.
- Demonstrated a notable reduction of 4X in the necessary dataset size when using transfer learning to mm-Wave passive network design.
- Can accelerate design migrations across technology nodes to facilitate rapid time-to-market prototyping and productization.
2023
Jan 3: I started my postdoctoral journey in IDEAS Group at ETH Zurich.
I am excited to share that I started my postdoctoral program in the IDEAS Group at ETH Zurich. I am honored to work with Prof. Dr. Hua Wang and look forward to contributing to the field of AI for RFIC and III-V/Si circuit co-designs.
2022
Oct 14: I successfully defended my PhD.
I am thrilled to announce that I have successfully defended my PhD thesis at University College Dublin.
- Ph.D. research and thesis supervisor Prof. Anding Zhu.
- External Examiner: Prof. Christian Fager, Internal Exminer: Prof. Teerachot Siriburanon and Prof. Simon Kelly.
- Thesis title: Broadband High Efficiency Power Amplifiers for RF Front-Ends of Wireless Transmitters.
Teaching
Teaching Activities
Prepared course slides and notes, designed homework and final exams, managed grading.
Guided students in digital electronics concepts, supported labs, graded assignments/reports.
Supervised student projects, supported labs, graded assignments, reports, and presentations.
Supervision and Mentoring of Graduate Students
Supervising 8 ETH Master’s students across 11 theses (Jan 2023 – Present) — GaAs MMIC designs, AI-assisted mm-Wave circuits, satellite communication modules.
- Jaquiéry MarcelMaster Student at ETH
Semester Thesis (Fall): High-Performance GaAs Ku-Band LNA (10.7 – 12.75 GHz) Designs and Testing for Next-Generation Satellite Communications - Veselaj GentMaster Student at ETH
Semester Thesis (Fall): Watt-Level GaAs Ku-Band PA (10.7 – 12.75 GHz) Designs and Testing for Next-Generation Satellite Communications - Zhuoran LiMaster Student at ETH
Semester Thesis (Fall): Advanced GaAs V-Band PA (47.7 – 50.2 GHz) for Designs and Testing for Next-Generation Satellite Communications - John DornbiererMaster Student at ETH
Semester Thesis (Spring): Power Amplifier Design for a UHF-to-S Band Linear Transponder in a CubeSat
- Filippo SveltoMaster Student at ETH (now Ph.D. Student in IDEAS Group, ETH)
Semester Thesis (Spring): AI-Assisted Complex Load Mismatch Prediction by Mm-Wave Reconfigurable Doherty Power Amplifier
Supervised 1 Master’s and 1 Ph.D. student at UCD (Jan 2021 – Dec 2022) — high-efficiency and linearity-enhanced RF power amplifiers.
- Monjed Al-TarifMaster of Engineering Student at UCD
Master Thesis (Spring, Fall): High Efficiency RF Power Amplifiers for 5G Wireless Communications - Yicun GuoPh.D. Student at UCD
Project (Spring): High Efficiency Power Amplifier with Enhanced IMD3 Performance
Awards
"Broadband Sequential Load Modulated Balanced Amplifier With Extended Design Space Using Second Harmonic Manipulation" (LinkedIn post)
"High Efficiency Class-iF⁻¹ Power Amplifier With Enhanced Linearity" (LinkedIn post)
Research Grants & Funded Projects
Progress: Two GaN MMIC tape-outs (delivered/published at IEEE RWW 2025), 6+ CMOS tape-outs (cm-/mm-Wave PAs, CMOS driver for GaN PAs; published at GeMiC 2025, IEEE IMS 2025).
Outcomes: 10+ papers in top journals/conferences (IEEE JSSC, T-MTT, IMS), 2 “Most Popular and Downloaded Papers” (IEEE T-MTT 2022–2023).
Outcomes: Published at IEEE IMS 2024. Open-source platform for AI-for-RFIC (github.com/ETH-IDEAS/RFIC-TL).
Progress: Supervising 5 ETH master’s students. Preparing tape-outs with Win Semiconductors, measuring at E-/W-/D-band.
Experience
Working Experience

Memberships In Societies And Scientific Reviewing Activities
Affiliated Member, IEEE MTT-S Technical Committee 12 on Microwave High Power Techniques Committee (TC-12)
Feb 2025 – Present
Technical Paper Review Committee (TPRC), IEEE International Microwave Symposium (IMS)
Oct 2024 – Present
TPRC Member, IEEE Radio Wireless Week (RWW)
July 2024 – Present
Vice-Chair, Electronic Information Committee (EICO), IEEE MTT-S
Jan 2025 – Present
Member, Electronic Information Committee, Inaugural 2024 World Microwave Congress (WMC2024)
May 2024
Member, IEEE, IEEE Young Professionals, MTT-S, AP-S, SSC-S
Aug 2018 – Present
Journal Reviewer
IEEE T-MTT, TCAS-I, TCAS-II, T-BioCAS, MWTL, AWPL, Microwave Magazine, Scientific Reports, Engineering, Micromachines, Results in Engineering, etc.
Aug 2018 – Present
Skills
Circuits and Systems
Design, layout, and simulation of RF integrated circuits using Cadence Virtuoso, Keysight ADS, Ansys HFSS, AutoCAD, and Cadence Microwave Office (AWR).
Programming
Python, LaTeX, MATLAB, LabVIEW.
Measurement Equipment
Vector network analyzer, PNA network analyzer, spectrum analyzer, power sensor/meter, signal generator, power supply, arbitrary waveform generator.
Device Packaging
PCB assembly, wire bonding, LPKF ProtoLaser machine.
Foundry Platforms and Tape-out Experience
CMOS: GlobalFoundries (GF) 22 nm FD-SOI, 45 nm SOI.
GaN: Win Semiconductors GaN NP12-01 (0.12 µm, 28 V), NP15-00 (0.15 µm, 28 V), NP25-00 (0.25 µm, 28 V), NP25-02 (0.25 µm, 28 V), Mitsubishi GaN (0.15 µm, 28 V), UMS-RF GH15 (0.15 µm HEMT, 20 V/25 V).
GaAs: Win Semiconductors 4V PQG3-0C, 6V PQG3-AF (0.15 µm E/D-pHEMT).
Others: High-density interconnect (HDI) PCB, low-temperature co-fired ceramic (LTCC).
Languages
Mandarin (native), English (proficient), Cantonese (advanced), German (basic).